1. Field of the Invention
The present invention relates to line drivers, and more particularly to high-speed, low-distortion line drivers.
2. Related Art
FIG. 1 shows a conventional output driver cell of a line driver currently employed in (Gigabit) Ethernet products. Each cell includes two differential pairs, enabling tri-state operation. Transistors M1a through M1d are cascodes, implemented using thick-oxide transistors. Transistors M3a and M3b implement the tail current sources of the two differential pairs, each providing a current IBIAS. Transistors M2a through M2d are switches (typically thin-oxide transistors) that control to which output terminal the bias current IBIAS is sent. More specifically, when Vswitch1 and Vswitch3 are logical “1”, and Vswitch2 and Vswitch4 are “0”, the differential output current IOUT equals −2 IBIAS. When Vswitch1 and Vswitch3 are “0”, and Vswitch2 and Vswitch4 are “1”, IOUT equals 2 IBIAS. When Vswitch1 through Vswitch4 are all “1”, IOUT equals zero. (In other words, the digital signal, or data signal, activates the switching transistors M2a-M2d.) A more detailed description of a conventional line driver can be found in commonly assigned U.S. Pat. No. 6,259,745.
VBIAS is a DC bias voltage that biases the tail current transistors M3a, M3b to an analog amplifier mode. The switches M2a-M2d send current to either the “+” or the “−” terminal of the output cell, which is a tri-state operating cell. The cell outputs either 2IBIAS, 0, or −2IBIAS. To output zero current, while operating the cell in class B mode, gates of switches M2a-M2d are switched to ground, and no current appears at the output. Due to the charge injected at node {circle around (1)}, the potential at the gate of M3 changes, resulting in distortion. Thus, there is unwanted modulation of the DC bias on the gate of the tail current transistors M3a, M3b. 
As noted above, when IOUT has to be zero, Vswitch1 through Vswitch4 switch to “0”. Unfortunately, switching off all four switches M2a-M2d results in significant distortion of the output signal IOUT. The cause of the distortion is explained by FIG. 2, which shows half of a line driver output cell. The distortion occurs when all four switches M2a-M2d are switched to “0”. In that case, node {circle around (2)} goes to ground potential. Through the parasitic capacitance Cp, charge is injected onto node {circle around (1)}. In general, the bias voltage VBIAS is generated by a current-biased diode, which has a finite output impedance modeled by RBIAS. Furthermore, the parasitic capacitance Cp,bias associated with the bias voltage VBIAS source and transistor M3 is quite large. As a consequence, the charge injected onto node {circle around (1)} causes the voltage on node {circle around (1)} to drop. It settles back slowly due to the finite voltage source impedance and the large parasitic capacitance connected to node {circle around (1)}. This results in modulation of the tail currents of the differential pairs, and therefore, in modulation of the amplitude of IOUT, in other words, unwanted distortion.
IOUT (in differential mode)=IOUT+−IOUT−. IOUT is the differential output signal current. Its magnitude depends on the symbol to be transmitted and varies from −40 mA to 40 mA (in 1000BT, 100TX mode), from −100 mA to 100 mA in 10BT mode). In Class AB mode, ICOMMON—MODE=(IOUT+−IOUT−)/2 varies from 20 mA to 10 mA, depending on the symbol to be transmitted. Thus: ICOMMON—MODE=20 mA (in Class-A mode).
ICOMMON—MODE varies from 20 mA to 10 mA (in Class-AB mode), hence the maximum saving of current is 10 mA. When ICOMMON—MODE switches from 20 mA to 10 mA, a glitch is seen that eventually settles to constant value—i.e., producing unwanted distortion.